FUJITSU SEMICONDUCTOR DATA SHEET
DS04-27241-1E
ASSP for Power Supply Applications (Secondary battery)
DC/DC Converter IC for Charging Li-ion Battery
MB39A114
s DESCRIPTION
The MB39A114 is a DC/DC converter IC of pulse width modulation (PWM) type for charging, capable of independently controlling the output voltage and output current. It is suitable for down conversion. MB39A114 can dynamically control the secondary battery's charge current by detecting a voltage drop in an AC adapter to keep its power constant (dynamically-controlled charging) . This IC can easily set the charge current value, making it ideal for use as a built-in charging device in products such as notebook PC.
s FEATURES
* * * * Built-in constant current control circuit in 2-system. Analog control of charge current value is possible. (+INE1 terminal and +INE2 terminal) Built-in AC adapter detection function (When VCC is lower than the battery voltage +0.2 V, output is fixed in the off.) Constant voltage control state detection function (CVM terminal) enables prevention of mis-detection for full charge. * Built-in overvoltage detection function (OVP terminal) of charge voltage (Continued)
s PACKAGE
24-pin plastic SSOP
(FPT-24P-M03)
MB39A114
(Continued) * Wide range of operating power-supply voltage range : 8 V to 25 V * Built-in output setting resistor * Built-in switching function (SEL terminal) of output setting voltage 16.8 V or 12.6 V * Output voltage setting accuracy : 0.74% (Ta = -10 C to +85 C) * Built-in high accuracy current detection amplifier : 5% (At the input voltage difference of 100 mV) , 15% (At the input voltage difference of 20 mV) * Output voltage setting resistor is open to enable prevention of invalidity current at IC standby (ICC = 0 A Typ). * Oscillation frequency range : 100 kHz to 500 kHz * Built-in current detection Amp with wide in-phase input voltage range : 0 V to VCC * Built-in soft-start function independent of loads * Built-in standby current function : 0 A (Typ) * Built-in totem-pole type output stage supporting Pch MOS FET devices.
2
MB39A114
s PIN ASSIGNMENT
(TOP VIEW)
-INC2 OUTC2 +INE2 -INE2 CVM
1
24
+INC2 GND
2
23
3
22
CS
4
21
VCC
5
20
OUT
VREF
6
19
VH
FB12 -INE1 +INE1 OUTC1
7
18
OVP
8
17
RT -INE3 FB3
9
16
10
15
SEL -INC1
11
14
CTL +INC1
12
13
(FPT-24P-M03)
3
MB39A114
s PIN DESCRIPTION
Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 Symbol -INC2 OUTC2 +INE2 -INE2 CVM VREF FB12 -INE1 +INE1 OUTC1 SEL -INC1 +INC1 CTL FB3 -INE3 RT OVP VH OUT VCC CS GND +INC2 I/O I O I I O O O I I O O I I I O I O O O I Description Current detection amplifier (Current Amp2) inverted input terminal Current detection amplifier (Current Amp2) output terminal Error amplifier (Error Amp2) non-inverted input terminal Error amplifier (Error Amp2) inverted input terminal Open drain type output terminal of constant voltage control state detection comparator (CV Comp.) Reference voltage output terminal Error amplifier (Error Amp1, Error Amp2) output terminal Error amplifier (Error Amp1) inverted input terminal Error amplifier (Error Amp1) non-inverted input terminal Current detection amplifier (Current Amp1) output terminal Charge voltage setting switch terminal (3 cell or 4 cell) "H" level in SEL terminal : charge voltage setting 16.8 V (4 Cell) "L" level in SEL terminal : charge voltage setting 12.6 V (3 Cell) Current detection amplifier (Current Amp1) inverted input terminal Current detection amplifier (Current Amp1) non-inverted input terminal Power-supply control terminal Setting the CTL terminal at "L" level places the IC in the standby mode. Error amplifier (Error Amp3) output terminal Error amplifier (Error Amp3) inverted input terminal Triangular wave oscillation frequency setting resistor connection terminal Open drain type output terminal overvoltage detection comparator (OV Comp.) Power supply terminal for FET drive circuit (VH = VCC - 6 V) External FET gate drive terminal Power supply terminal for reference power supply, control circuit and output circuit Soft-start capacitor connection terminal Ground terminal Current detection amplifier (Current Amp2) non-inverted input terminal
4
MB39A114
s BLOCK DIAGRAM
- -INE1 + 8 2.6 V OUTC1 +INC1 -INC1 10 13 12 - + + 0.2 V + VREF
5 CVM
- 1.4 V - + - -INC2 (VO) + + - 21 VCC Drive 20 OUT VREF R1 VCC - 6 V 19 VH -2.5 V -1.5 V VH Bias Voltage UVLO VREF UVLO 4.2 V bias 10 A 500 kHz [ 14 CTL VCC CT 45 pF 17 RT VREF 5.0 V 6 VREF 23 GND x20 + 18 OVP]
+INE1 -INE2
9
4
OUTC2 +INC2 -INC2 +INE2 FB12
2 24 1 3 7 + x20
-INE3
16 R2
FB3 SEL H : 4Cell L : 3Cell
15 11 VREF
CS
22
- -
- + +
- + +
4.2 V/3.15 V
5
MB39A114
s ABSOLUTE MAXIMUM RATINGS
Parameter Power supply voltage Output current Peak output current Power dissipation Storage temperature Symbol VCC IOUT IOUT PD TSTG Ta +25 C Conditions VCC terminal Duty 5% (t = 1/fosc x Duty) Rating Min -55 Max 28 60 700 740* +125 Unit V mA mA mW C
* : The packages are mounted on the dual-sided epoxy board (10 cm x 10 cm) . WARNING: Semiconductor devices can be permanently damaged by application of stress (voltage, current, temperature, etc.) in excess of absolute maximum ratings. Do not exceed these ratings.
6
MB39A114
s RECOMMENDED OPERATING CONDITIONS
Parameter Power supply voltage Reference voltage output current VH terminal output current Input voltage CTL terminal input voltage Output current Peak output current CVM terminal output voltage CVM terminal output current OVP terminal output voltage OVP terminal output current SEL terminal input voltage Oscillation frequency Timing resistor Soft-start capacitor VH terminal capacitor Reference voltage output capacitor Operating ambient temperature Symbol VCC IREF IVH VINE VINC VCTL IOUT IOUT VCVM ICVM VOVP IOVP VSEL fosc RT CS CVH CREF Ta Conditions VCC terminal -INE1 to -INE3, +INE1, +INE2 terminal +INC1, +INC2, -INC1, -INC2 terminal Duty = 5% (t = 1/fosc x Duty) Value Min 8 -1 0 0 0 0 -45 -600 0 0 0 0 0 100 27 -30 Typ 300 47 0.022 0.1 0.1 +25 Max 25 0 30 5 VCC 25 +45 +600 25 1 25 1 25 500 130 1.0 1.0 1.0 +85 Unit V mA mA V V V mA mA V mA V mA V kHz k F F F C
WARNING: The recommended operating conditions are required in order to ensure the normal operation of the semiconductor device. All of the device's electrical characteristics are warranted when the device is operated within these ranges. Always use semiconductor devices within their recommended operating condition ranges. Operation outside these ranges may adversely affect reliability and could result in device failure. No warranty is made with respect to uses, operating conditions, or combinations not represented on the data sheet. Users considering application outside the listed conditions are advised to contact their FUJITSU representatives beforehand.
7
MB39A114
s ELECTRICAL CHARACTERISTICS
Parameter Output voltage Reference voltage block [REF] Input stability Load stability Output current at short circuit Under voltage lockout protection circuit block [UVLO] Soft start block [SOFT] Threshold voltage Hysteresis width Charge current Symbol Pin No. VREF1 VREF2 Line Load Ios VTLH VTHL VH ICS fosc f/fdt VIO IB VCM AV BW VFBH VFBL ISOURCE ISINK 6 6 6 6 6 6 6 6 22 20 (VCC = 19 V, VREF = 0 mA, Ta = +25 C) Value Conditions Unit Min Typ Max Ta = +25 C Ta = -10 C to +85 C VCC = 8 V to 25 V VREF = 0 mA to -1 mA VREF = 1 V VREF = VREF = RT = 47 k Ta = -30 C to +85 C 4.975 4.963 -50 2.6 2.4 -14 270 -100 0 FB12 = 2 V FB12 = 2 V 4.8 2.0 5.000 5.000 3 1 -25 2.8 2.6 0.2* -10 300 5.025 5.037 10 10 -12 3.0 2.8 -6 330 5 VCC - 1.8 0.9 -60 V V mV mV mA V V V A kHz % mV nA V dB MHz V V A mA
Oscillation Triangular wave frequency oscillator block Frequency [OSC] temperature stability Input offset voltage Input bias current In-phase input voltage range Error amplifier block [Error Amp1, Error Amp2] Voltage gain Frequency bandwidth Output voltage Output source current Output sink current * : Standard design value
20
1*
3, 4, 8, 9 FB12 = 2 V 3, 4, 8, 9 3, 4, 8, 9 7 7 7 7 7 7 DC AV = 0 dB
1 -30 100* 1.3* 5.0 0.8 -120 4.0
(Continued)
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MB39A114
(VCC = 19 V, VREF = 0 mA, Ta = +25 C) Value Conditions Unit Min Typ Max DC AV = 0 dB FB3 = 2 V FB3 = 2 V SEL = 5 V, FB3 = 2 V, Ta = +25 C SEL = 5 V, FB3 = 2 V, Ta = -10 C to +85 C SEL = 0 V, FB3 = 2 V, Ta = +25 C SEL = 0 V, FB3 = 2 V, Ta = -10 C to +85 C -INC2 = 16.8 V VCC = 0 V, -INC2 = 16.8 V +INE3 = 4.2 V (4 Cell setting) +INE3 = 3.15 V (3 Cell setting) SEL = 5 V SEL = 0 V 4.8 2.0 100* 1.3* 5.0 0.8 -120 4.0 0.9 -60 dB MHz V V A mA V V V V A A k k V V A A mV A A A A
Parameter Voltage gain Frequency bandwidth Output voltage Output source current Output sink current
Symbol Pin No. AV BW VFBH VFBL ISOURCE ISINK VTH1 VTH2 VTH3 VTH4 15 15 15 15 15 15 1 1 1 1 1 1 1, 16 16 11 11 11 11
16.716 16.800 16.884 16.676 16.800 16.924 12.537 12.600 12.663 12.507 12.600 12.694 105 35 2 0 -3 -180 -195 84 150 50 50 0 20 0.1 -120 -130 150 1 195 65 25 0.8 100 1 +3 30 0.2
Error amplifier block [Error Amp3]
Threshold voltage
Input current Input resistance SEL input voltage
IIN IINL R1 R2 VON VOFF ISELH ISELL VIO I + INCH I - INCH I + INCL I - INCL
Input current Input offset voltage Current detection amplifier block [Current Amp1, Input current Current Amp2]
1, 12, +INC1 = +INC2 = 13, 24 -INC1 = -INC2 = 3 V to VCC 13, 24 12 13, 24 1, 12 +INC1 = +INC2 = 3 V to VCC, VIN = -100 mV +INC1 = 3 V to VCC, VIN = -100 mV +INC1 = +INC2 = 0 V, VIN = -100 mV +INC1 = +INC2 = 0 V, VIN = -100 mV
* : Standard design value
(Continued)
9
MB39A114
(VCC = 19 V, VREF = 0 mA, Ta = +25 C) Parameter Symbol Pin No. VOUTC1 Current detection voltage VOUTC2 VOUTC3 VOUTC4 Current In-phase input detection voltage range amplifier block [Current Amp1, Voltage gain Current Amp2] Frequency bandwidth Output voltage Output source current Output sink current PWM comparator block [PWM Comp.] Threshold voltage Output source current Output sink current Output ON resistor Rise time Fall time Threshold AC adaptor voltage detection block Hysteresis [UV Comp.] width * : Standard design value VCM AV BW VOUTCH VOUTCL ISOURCE ISINK VTL VTH ISOURCE ISINK ROH ROL tr1 tf1 VTLH VTHL VH 2, 10 2, 10 2, 10 2, 10 1, 12, 13, 24 2, 10 2, 10 2, 10 2, 10 2, 10 2, 10 7, 15 7, 15 20 20 20 20 20 20 21 21 21 Conditions +INC1 = +INC2 = 3 V to VCC, VIN = -100 mV +INC1 = +INC2 = 3 V to VCC, VIN = -20 mV +INC1 = +INC2 = 0 V, VIN = -100 mV +INC1 = +INC2 = 0 V, VIN = -20 mV +INC1 = +INC2 = 3 V to VCC, VIN = -100 mV AV = 0 dB OUTC1 = OUTC2 = 2 V OUTC1 = OUTC2 = 2 V Duty cycle = 0% Duty cycle = 100% OUT = 13 V, Duty 5% (t = 1/fosc x Duty) OUT = 19 V, Duty 5% (t = 1/fosc x Duty) OUT = - 45 mA OUT = 45 mA OUT = 3300 pF OUT = 3300 pF VCC = VCC = , -INC2 = 16.8 V , -INC2 = 16.8 V Value Min 1.9 0.34 1.8 0.2 0 19 4.7 150 1.4 17.2 16.8 Typ 2.0 0.40 2.0 0.4 20 2* 4.9 20 -2 300 1.5 2.5 - 400* 400* 6.5 5.0 50* 50* 17.4 17.0 0.4* Max 2.1 0.46 2.2 0.6 VCC 21 200 -1 2.6 9.8 7.5 17.6 17.2 Unit V V V V V V/V MHz V mV mA A V V mA mA ns ns V V V
Output block [OUT]
(Continued)
10
MB39A114
(Continued)
Parameter Threshold voltage Constant voltage control state detection block [CV Comp.] Hysteresis width CMV terminal output leak current CVM terminal output ON resistor Threshold voltage Hysteresis width Symbol Pin No. VTLH VTHL VH 5 5 5 (VCC = 19 V, VREF = 0 mA, Ta = +25 C) Value Conditions Unit Min Typ Max FB3 = FB3 = CVM = 25 V 2.6 2.5 2.7 2.6 0.1* 2.8 2.7 1 V V V A
ILEAK
5
0
RON VTLH VTHL VH
5 18 18 18
CVM = 1 mA FB3 = FB3 = OVP = 25 V
1.3 1.2
200 1.4 1.3 0.1*
400 1.5 1.4 1
V V V A
Overvoltage detection block OVP terminal output leak [OV Comp.] current OVP terminal output ON resistor CTL input voltage Input current Bias voltage block [VH]
ILEAK
18
0
RON VON VOFF ICTLH ICTLL VH
18 14 14 14 14 19
OVP = 1 mA IC operating state IC standby staet CTL = 5 V CTL = 0 V VCC = 8 V to 25 V, VH = 0 mA to 30 mA CTL = 0 V CTL = 5 V
2 0
200 100 0
400 25 0.8 150 1
V V A A V A mA
Control block [CTL]
Output voltage Standby current Power supply current
VCC - 6.5 VCC - 6.0 VCC - 5.5 0 5 10 7.5
ICCS ICC
21 21
General
* : Standard design value
11
MB39A114
s TYPICAL CHARACTERISTICS
Power Supply Current vs. Power Supply Voltage Power supply current ICC (mA)
6 5 4 3 2 1 0 0 5 10 15 Ta = +25 C CTL = 5 V 20 25
CTL terminal Input Current, Reference Voltage vs. CTL terminal Input Voltage CTL terminal input current ICTL (A)
Ta = +25 C VCC = 19 V VREF = 0 mA VREF
ICTL
0
5
10
15
20
25
Power supply voltage VCC (V)
CTL terminal input voltage VCTL (V)
Reference voltage vs. Power Supply voltage Reference voltage VREF (V)
6
Reference Voltage vs. Load Current Reference voltage VREF (V)
6 5 4 3 2 1 0 0 5 10 15 20 25 30 35 Ta = +25 C VCC = 19 V CTL = 5 V
5 4 3 2 1 0 0 5 10 15 20 25 Ta = +25 C CTL = 5 V VREF = 0 mA
Power supply voltage VCC (V)
Load current IREF (mA)
Reference Voltage vs. Operating Ambient Temperature Reference voltage VREF (V)
5.08 5.06 5.04 5.02 5.00 4.98 4.96 4.94 4.92 -40 -20 0 20 40 60 80 100 VCC = 19 V CTL = 5 V VREF = 0 mA
Operating ambient temperature Ta ( C)
(Continued)
12
Reference voltage VREF (V)
1000 900 800 700 600 500 400 300 200 100 0
10 9 8 7 6 5 4 3 2 1 0
MB39A114
Triangular Wave Oscillation Frequency vs. Power Supply Voltage
340 Ta = +25 C CTL = 5 V RT = 47 k
Triangular Wave Oscillation Frequency vs. Operating Ambient Temperature
340 VCC = 19 V CTL = 5 V RT = 47 k
Triangular wave oscillation frequency fosc (kHz)
320 310 300 290 280 270 260 0 5 10 15
Triangular wave oscillation frequency fosc (kHz)
330
330 320 310 300 290 280 270 260 -40 -20 0 20 40
20
25
60
80
100
Power supply voltage VCC (V)
Operating ambient temperature Ta ( C)
Triangular Wave Oscillation Frequency vs. Timing Resistor
1000
Triangular wave oscillation frequency fosc (kHz)
Ta = +25 C VCC = 19 V CTL = 5 V
100
10 10
100
1000
Timing resistor RT (k) Error Amplifier Threshold Voltage vs. Ambient Temperature
Error amplifier threshold voltage VTH (V)
4.25 4.24 4.23 4.22 4.21 4.20 4.19 4.18 4.17 4.16 4.15 -40 -20 0 20 40 60 80 100 VCC = 19 V CTL = 5 V
Ambient temperature Ta ( C)
(Continued)
13
MB39A114
Error Amplifier Gain, Phase vs. Frequency
40 30 Ta = +25 C VCC = 19 V 180 240 k
Gain AV (dB)
20 10 0 -10 -20 -30 -40 100 1k 10 k 100 k AV
Phase (deg)
90 10 k 1 F
+
0
IN
-90
8 2.4 k (4) 9 10 k (3)
- + + CS 7 OUT Error Amp1 (Error Amp2)
-180 1M 10 M
Frequency f (Hz) Error Amplifier Gain, Phase vs. Frequency
40 30 20 90 240 k Ta = +25 C VCC = 19 V 180
Gain AV (dB)
Phase (deg)
10 0 -10 -20 -30 -40 100 1k 10 k 100 k 1M -180 10 M -90 AV 0
10 k 1 F
+
16 2.4 k
- + + 4.2 V 15 OUT Error Amp3
IN 10 k
CS
Frequency f (Hz) Current Detection Amplifier Gain, Phase vs. Frequency
40 30 AV 90 180
Gain AV (dB)
20 10 0 -10 -20 -30 -40 100 1k 10 k 100 k 1M
Phase (deg)
10 k 1 F
+
VCC = 19 V 13 + (24) 12 - (1)
0
IN 10 k
10 (2) OUT
-90
12.6 V Current Amp1 (Current Amp2) -180 10 M
Frequency f (Hz)
(Continued)
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MB39A114
(Continued)
Power Dissipation vs. Operating Ambient Temperature Power dissipation PD (mW)
800 740 700 600 500 400 300 200 100 0 -40 -20 0 20 40 60 80 100
Operating ambient temperature Ta ( C)
15
MB39A114
s FUNCTIONAL DESCRIPTION
1. DC/DC Converter Block
(1) Reference voltage block (REF) The reference voltage circuit generator uses the voltage supplied from the VCC terminal (pin 21) to generate a temperature compensated stable voltage (5.0 V Typ) used as the reference supply voltage for the internal circuits of the IC. It is also possible to supply the load current of up to 1 mA to external circuits as a output reference voltage through the VREF terminal (pin 6) . (2) Triangular wave oscillator block (OSC) The triangular wave oscillator block has built-in capacitor for frequency setting, and generates the triangular wave oscillation waveform by connecting the freguency setting resistor with the RT terminal (pin 17) . The triangular wave is input to the PWM comparator circuits on the IC. (3) Error amplifier block (Error Amp1) The error amplifier (Error Amp1) detects voltage drop of the AC adapter and outputs a PWM control signal. Also, by connecting feedback resistor and capacitor between FB12 terminal (pin 7) and -INE1 terminal (pin 8), it is possible to set the desired level of loop gain, to provide stabilized phase compensation to the system. The CS terminal (pin 22) can be connected to a soft-start capacitor to prevent rush currents at startup. The soft start time is detected by the error amplifier, which provides a constant soft-start time independent of output load. (4) Error amplifier block (Error Amp2) The amplifier detects output signal from the current detection amplifier (Current Amp 2) . This is amplifier providing PWM control signal by comparing to +INE2 terminal (pin3), and it is used to control the charging current. Also, by connecting feedback resistor and capacitor between FB12 terminal (pin 7) and -INE2 terminal (pin 4) , it is possible to set the desired level of loop gain, to provide stabilized phase compensation to the system. The CS terminal (pin 22) can be connected to a soft-start capacitor to prevent rush currents at startup. The soft start time is detected by the error amplifier, which provides a constant soft-start time independent of output load. (5) Error amplifier block (Error Amp3) The error amplifier (Error Amp3) detects output voltage of the DC/DC converter and outputs a PWM control signal. Output voltage become 16.8 V if the SEL terminal is set in "H" level, and become 12.6 V if it sets in "L" level . Also, by connecting feedback resistor and capacitor between FB3 terminal (pin 15) and -INE3 terminal (pin 16) , it is possible to set the desired level of loop gain, to provide stabilized phase compensation to the system. The CS terminal (pin 22) can be connected to a soft-start capacitor to prevent rush currents at startup. The soft start time is detected by the error amplifier, which provides a constant soft-start time independent of output load. (6) Current detection amplifier block (Current Amp1) The current detection amplifier (Current Amp1) detects a voltage drop which occurs between both ends of the output sense resistor (RS) due to the flow of the charge current, using the +INC1 terminal (pin 13) and -INC1 terminal (pin 12) . Then it outputs the signal amplified by 20 times to the error amplifier (Error amp1) at the next stage.
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MB39A114
(7) Current detection amplifier block (Current Amp2) The current detection amplifier (Current Amp2) detects a voltage drop which occurs between both ends of the output sense resistor (RS) due to the flow of the charge current, using the +INC2 terminal (pin 24) and -INC2 terminal (pin 1) . Then it outputs the signal amplified by 20 times to the error amplifier (Error Amp2) at the next stage. (8) PWM comparator block (PWM Comp.) The PWM comparator circuit is a voltage-pulse width converter that controls the output duty of the error amplifier (Error Amp.1 to Error Amp.3) according to the output voltage. It is compared between triangular wave voltage generated in triangular wave oscillator and error amplifier output voltage and during intervals when the triangular wave voltage is lower than the error amplifier output voltage, an external output transistor is switched on. (9) Output block (OUT) The output circuit uses a totem-pole configuration and is capable of driving an external P-ch MOS FET device. For the output "L" level, set the output amplitude to 6 V (Typ) using the voltage generated by the bias voltage block (VH) . This results in higher conversion efficiency and suppressing the withstand voltage of the connected external transistor even in a wide range of input voltages. (10) Power control (CTL) Setting the CTL terminal (14 pin) low places the IC in the standby mode. (Power supply current 10 A max at standby mode.) CTL function table CTL L H (11) Bias voltage block (VH) The bias voltage circuit outputs VCC - 6 V (Typ) as the minimum potential of the output circuit. In the standby mode, this circuit outputs the potential equal to VCC. Power OFF (Standby) ON (Active)
2. Protection Function
(1) Under voltage lockout protection circuit (UVLO) The transient state, which occurs when the power supply (VCC) is turned on, a momentary decrease in supply voltage or internal reference voltage (VREF), may cause the control IC to malfunction, resulting in breakdown or degradation of the system. To prevent such malfunctions, under voltage lockout protection circuit detects a internal reference voltage drop and fixes the OUT terminal (pin 20) at the "H" level. The system restores voltage supply when the internal reference voltage reaches the threshold voltage of the under voltage lockout protection circuit. Protection circuit (UVLO) operation function table. At UVLO operating (VREF voltage is lower than UVLO threshold voltage.) OUT CS CVM OVP H L H H
17
MB39A114
(2) AC adapter detection block (UV Comp.) This block detects that power-supply voltage (VCC) is lower than the battery voltage +0.2 V (Typ) , and OUT terminal (pin 18) is fixed at the High level. The system restores voltage supply when the supply voltage reaches the threshold voltage of the AC adapter detection block. Protection circuit (UV Comp.) operation function table. At UV Comp. operating (VCC voltage is lower than UV Comp. threshold voltage.) OUT CS H L
3. Soft start Function
Soft start block (SOFT) Connecting a capacitor to the CS terminal (pin 22) prevents rush currents from flowing upon activation of the power supply. Using the error amplifier to detect a soft start allows to soft-start at constant setting time intervals independent of the output load of the DC/DC converter.
4. Detection Function
(1) Constant voltage control state detection block. (CV Comp.) Error amplifier (Error Amp3) detects the voltage at FB3 terminal (pin 15) falling to or below 2.6 V (Typ) and outputs the Low level to the constant voltage control state detection block output terminal (CVM, pin 5) . (2) Overvoltage state detection block (OV Comp.) Error amplifier (Error Amp3) detects the voltage at FB3 terminal (pin 15) falling to or below 1.3 V (Typ) and outputs the High level to the overvoltage detection block output terminal (OVP pin 18) . ,
5. Switching function
Output voltage switching function block (SEL) The charge voltage is set in 16.8 V or 12.6 V by SEL terminal (pin 11) . SEL function table SEL DC/DC output setting voltage H L 16.8 V 12.6 V
18
MB39A114
s SETTING THE CHARGING VOLTAGE
The setting of the charging voltage is switched to 3 cell or 4 cell by the SEL terminal. As for the charge voltage, the SEL terminal becomes 16.8 V at "H" level. It become 12.6 V at "L" level. Charging voltage of battery : VO VO (V) = (150 k + 50 k) /50 k x 4.20 V = 16.8 (SEL = H) VO (V) = (150 k + 50 k) /50 k x 3.15 V = 12.6 (SEL = L)
VO B
-INC2 1
-INE3 16
R3
150 k
-
R4
50 k
+ +
CS
22
SEL 11
3.15 V
4.2 V
s SETTING THE CHARGING CURRENT
The charging current value (output limit current value) is set at the +INE2 terminal (pin 3) . If a current exceeding the set value attempts to flow, the charge voltage drops according to the set current value. Battery charge current setting voltage : +INE2 +INE2 (V) = 20 x I1 (A) x RS ()
s SETTING THE TRIANGULAR WAVE OSCILLATION FREQUENCY
The triangular wave oscillation frequency can be set by connecting a timing resistor (RT ) to the RT terminal (pin 17) . Triangular wave oscillation frequency : fosc fosc (kHz) = 14100/RT (k) :
19
MB39A114
s SETTING THE SOFT START TIME
(1) Setting constant voltage mode soft start To prevent rush currents when the IC is turned on, you can set a soft-start by connecting soft-start capacitors (CS ) to the CS terminal (pin 22). When CTL terminal (pin 14) is "H" levels and IC is activated (VCC UVLO threshold voltage), Q2 becomes off and the external soft-start capacitors (CS) connected to CS terminal are charged at 10 A. The error amplifier output (FB3 terminal (pin 15) ) is determined by comparison between the lower voltage of the two non-inverted input terminal voltage (internal reference voltage 4.2 V (Typ) , CS terminal voltages) and the inverted input terminal voltage (-INE3 terminal (pin 16) voltage). The FB3 is decided for the soft-start period (CS terminal voltage < 4.2 V) by the comparison between -INE3 terminal voltage and CS terminal voltage. The DC/DC converter output voltage rises in proportion to the CS terminal voltage as the soft-start capacitor externally connected to the CS terminal is charged. The soft-start time is obtained from the following formula : Soft start time : ts (time until output voltage 100%) ts (s) = 0.42 x CS (F) : = 4.9 V : = 4.2 V : CS terminal voltage Internal reference voltage in Error Amp block
=0V :
Soft-start time : ts
VREF
10 A
10 A
FB3 15 -INE3 16 CS 22 - + + 4.2 V CS Q2
Error Amp3
UVLO
Soft start circuit
20
MB39A114
(2) Setting constant current mode soft-start To prevent rush currents when the IC is turned on, you can set a soft-start by connecting soft-start capacitors (CS ) to the CS terminal (pin 22). When CTL terminal (pin 14) is "H" levels and IC activated (VREF UVLO threshold voltage), Q2 becomes off and the external soft-start capacitors (CS) connected to CS terminal are charged at 10 A. The error amplifier1 output (FB12 terminal (pin 7) ) is determined by comparison between the lower voltage of the two non-inverted input terminal voltage (+INE1 terminal (pin 9) voltage, CS terminal voltages) and the inverted input terminal voltage (-INE1 terminal (pin 8) voltage). The FB12 is decided for the soft-start period (CS terminal voltage < +INE1) by the comparison between -INE1 terminal voltage and CS terminal voltage. The DC/DC converter output voltage rises in proportion to the CS terminal voltage as the soft-start capacitor externally connected to the CS terminal is charged. The error amplifier2 output (FB12 terminal (pin 7) ) is determined by comparison between the lower voltage of the two non-inverted input terminal voltage (+INE2 terminal (pin 3) voltage, CS terminal voltages) and the inverted input terminal voltage (-INE2 terminal (pin 4) voltage). The FB12 is decided for the soft-start period (CS terminal voltage < +INE2) by the comparison between -INE2 terminal voltage and CS terminal voltage. The DC/DC converter output voltage rises in proportion to the CS terminal voltage as the soft-start capacitor externally connected to the CS terminal is charged. The soft-start time is obtained from the following formula : Soft start time : ts (time until output voltage 100%) ts (s) = +INE1 (+INE2) /10 A x CS (F) :
= 4.9 V : +INE1 (+INE2) =0V :
CS terminal voltage Comparison voltage with Error Amp1block -INE1 voltage (comparison voltage with Error Amp2 block -INE2 voltage)
Soft-start time : ts
21
MB39A114
VREF
10 A
10 A
FB12 -INE1 -INE2 CS +INE1 CS +INE2
7 Error Amp1 (Error Amp2) 8 4 22 9 3 Q2 UVLO - + +
Soft start circuit
22
MB39A114
s SETTING THE DYNAMICALLY-CONTROLLED CHARGING
With an external resistor connected to +INE1 terminal (pin 9) , dynamically-controlled charging mode to reduce the charge current to keep AC adapter power constant when the partial potential point A of AC adapter voltage (VCC) become lower the -INE1 terminal voltage. Dynamically-controlled charging setting voltage : Vth Vth (V) = (R1 + R2) /R2 x -INE1
-INE1 8 VCC R1 R2 A +INE1 9
- +
23
MB39A114
s ABOUT CONSTANT VOLTAGE CONTROL STATE DETECTION/ OVERVOLTAGE DETECTION TIMING CHART
In the constant voltage control state, the CVM terminal (pin 5) of the constant voltage control state detection block (CV Comp.) outputs the "L" level when the voltage at the FB3 terminal (pin 15) of the error amplifier (Error Amp3) becomes 2.6 V (Typ) or less. When the DC/DC converter output voltage enters the state of the overvoltage higher than a setting voltage, the voltage at FB3 terminal (pin 15) of the error amplifier (Error Amp3) becomes 1.3 V (Typ) or less. As a result, the OVP terminal (pin 18) of the overvoltage detection block (OVComp.) outputs the "H" level. Both of the CVM terminal and the OVP terminal are open-drain output forms :
Error Amp3 FB3 2.6 V CV Comp. VTHL 2.5 V
Error Amp2 Error Amp1 FB12 1.5 V 1.3 V OV Comp. VTHL CV Comp. CVM
OV Comp. OVP OUT
Constant current control
Constant voltage control
Overvoltage State
24
MB39A114
s ABOUT THE OPERATION TIMING CHART
Error Amp2 Error Amp1 FB12
2.5 V
Error Amp3 FB3 1.5 V Current Amp2 OUTC2
OUT
Constant voltage control
Constant current control
AC adapter dynamicallycontrolled charging
25
MB39A114
s PROCESSING WITHOUT USING OF THE CURRENT AMP1 AND AMP2
When Current Amp is not used, connect the +INC1 terminal (pin 13), and -INC1 terminal (pin 12) to VREF, and be short-circuited of +INC2 terminal (pin 24) and -INC2 terminal (pin 1) , and then leave OUTC1 terminal (pin 10) and OUTC terminal (pin 2) open. * Connection when Current Amp is not used
VO
12 1 10
-INC1 -INC2 OUTC1 OUTC2
+INC1 +INC2
13 24
"Open"
2
6
VREF
s PROCESSING WITHOUT USING OF THE ERROR AMP1 AND AMP2
When Error Amp is not used, leave FB12 terminal (pin 7) open and connect the -INE1 terminal (pin 8) and -INE2 terminal (pin 4) to GND, and connect +INE1 terminal (pin 9) and +INE2 terminal (pin 3) to VREF. * Connection when Error Amp is not used
9 3 8 4
+INE1 +INE2 -INE1 -INE2
GND
23
"Open"
7 6
FB12 VREF
26
MB39A114
s PROCESSING WITHOUT USING OF THE CS TERMINAL
When soft-start function is not used, leave the CS terminal (pin 22) open. * Connection when no soft-start time is specified
"Open"
CS 22
27
MB39A114
s I/O EQUIVALENT CIRCUIT
Reference voltage block
VCC 21 + - 6 VREF
Control block
CTL 14 37.8 k 12.35 k 33.1 k 51 k
ESD protection element
ESD protection element
GND
GND 23
Soft start block
VREF (5.0 V)
Triangular wave oscillator block
VCC VREF (5.0 V) VCC
Error amplifier block (Error Amp1)
22 CS 1.3 V + - -INE1 8 17 RT GND GND GND 9 +INE1 CS 7 FB12
Error amplifier block (Error Amp2)
VCC VREF (5.0 V) -INE2 4 CS FB12 VCC VREF (5.0 V)
Error amplifier block (Error Amp3)
-INE3 16
CS 4.2 V
15 FB3
GND 3 +INE2
GND
Current detection amplifier block (Current Amp1)
VCC
Current detection amplifier block (Current Amp2)
VCC
+INC1 13 10 OUTC1
+INC2 24 2 OUTC2
GND 12 -INC1
GND 1 -INC1
(Continued)
28
MB39A114
(Continued)
PWM comparator block
VCC
Output block
VCC
AC adapter detection block
VCC -INC2
FB12 FB3
CT
20 OUT
VREF (5.0 V)
VH GND GND GND
Constant voltage control state detection block
VCC VREF (5.0 V) FB3
Overvoltage detection block
VCC VREF (5.0 V) FB3
5 CVM
18 OVP
GND
GND
Bias voltage block
VCC
Output voltage switching function block
SEL 11 85 k 19 VH 97 k GND GND
29
MB39A114
s APPLICATION EXAMPLE
D2 VIN (8 to 25 V) R4 180 k R5 330 k R6 30 k R10 120 k C8 10000 pF -INE1 5
- + 8 2.6 V - + + 0.2 V + VREF
CVM
R11 30 k
R7 22 k
OUTC1 +INC1 -INC1
10 13 12
- 1.4 V + - -INC2 (VO) + + - 21 x20 + Drive 20 VREF VCC - 6 V 19 -2.5 V -1.5 V VH Bias Voltage UVLO VREF UVLO 4.2 V bias 10 A 500 kHz VCC [ CT 45 pF 17 RT R2 47 k VREF 6 GND VREF 5.0 V 23 C9 0.1 F 18]
OVP
+INE1 -INE2 C10 4700 pF R9 10 k A B R12 30 k R13 20 k R16 200 k Q2 R8 100 k OUTC2 +INC2 -INC2 +INE2 FB12 R14 1 k R15 120
9
4 2 24 1 3 7 + x20
SW
-INE3
R1 16 R2 - + +
C6 1500 pF R3 330 k FB3 SEL H : 4Cell L : 3Cell 15 11 VREF
CS C11 0.022 F
22
30
- -
- + +
VCC
C12 0.1 F OUT
C7 0.1 F
C1 4.7 F
C2 4.7 F A Q1 I1 L1 R27 100 k VO Q3 B
VH
15 H
+
R1 0.033 C4 4.7 F Battery
D1
C3 22 F
4.2 V/3.15 V
CTL 14
MB39A114
s PARTS LIST
COMPONENT Q1, Q3 Q2 D1, D2 L1 C1, C2, C4 C3 C6 C7, C9 C8 C10 C11 C12 R1 R2 R3, R5 R4 R6 R7 R8 R9 R10 R11, R12 R13 R14 R15 R16 R27 Note : NEC
SANYO ROHM SUMIDA TDK KOA ssm OS-CON
ITEM Pch FET Nch FET Diode Inductor Ceramics Condenser OS-CONTM Ceramics Condenser Ceramics Condenser Ceramics Condenser Ceramics Condenser Ceramics Condenser Ceramics Condenser Resistor Resistor Resistor Resistor Resistor Resistor Resistor Resistor Resistor Resistor Resistor Resistor Resistor Resistor Resistor
SPECIFICATION VDS = -30 V, ID = -7.0 A VDS = 30 V, ID = 1.4 A VF = 0.42 V (Max) , At IF = 3 A 15 H 4.7 F 22 F 1500 pF 0.1 F 0.01 F 4700 pF 0.022 F 0.1 F 33 m 47 k 330 k 180 k 30 k 22 k 100 k 10 k 120 k 30 k 20 k 1 k 120 200 k 100 k 3.6 A, 50 m 25 V 20 V 50 V 50 V 50 V 50 V 50 V 50 V 1% 0.5% 0.5% 0.5% 0.5% 0.5% 0.5% 0.5% 0.5% 0.5% 0.5% 0.5% 0.5% 0.5% 0.5%
VENDOR NEC SANYO ROHM SUMIDA TDK SANYO TDK TDK TDK TDK TDK TDK KOA ssm ssm ssm ssm ssm ssm ssm ssm ssm ssm ssm ssm ssm ssm
PARTS No. PA2714GR MCH3401 RB053L-30 CDRH104R-150 C3225JB1E475K 20SVP22M C1608JB1H152K C1608JB1H104K C1608JB1H103K C1608JB1H472K C1608JB1H223K C1608JB1H104K SL1TTE33LOF RR0816P-473-D RR0816P-334-D RR0816P-184-D RR0816P-303-D RR0816P-223-D RR0816P-104-D RR0816P-103-D RR0816P-124-D RR0816P-303-D RR0816P-203-D RR0816P-102-D RR0816P-121-D RR0816P-204-D RR0816P-104-D
: NEC Corporation : SANYO Electric Co., Ltd. : ROHM CO., LTD. : Sumida Corporation : TDK Corporation : KOA Corporation : SUSUMU CO., LTD. is a trademark of SANYO Electric Co., Ltd.
31
MB39A114
s SELECTION OF COMPONENTS
* Pch MOS FET The P-ch MOS FET for switching use should be rated for at least +20% more than the input voltage. To minimize continuity loss, use a FET with low RDS(ON) between the drain and source. For high input voltage and high frequency operation, on-cycle switching loss will be higher so that power dissipation must be considered. In this application, the NEC PA2714GR is used. Continuity loss, on/off switching loss and total loss are determined by the following formulas. The selection must ensure that peak drain current does not exceed rated values. Continuity loss : Pc PC = ID2 x RDS (ON) x Duty
On-cycle swiching loss : PS (ON) PS (ON) = VD (Max) x ID x tr x fosc 6
Off-cycle switching loss : PS (OFF) PS (OFF) = VD (Max) x ID (Max) x tf x fosc 6
Total loss : PT PT = PC + PS (ON) + PS (OFF) Example : Using the PA2714GR 16.8 V setting Input voltage VIN (Max) = 25 V, output voltage VO = 16.8 V, drain current ID = 3 A, oscillation frequency fosc = 300 kHz, L = 15 H, drain-source on resistance RDS (ON) = 18 m, tr = 15 ns, tf = 42 ns : : : Drain current (Max) : ID (Max) ID (Max) = = Io + 3+ VIN (Max) - Vo 2L 25 - 16.8 2 x 15 x 10 -
6
tON x 1 300 x 103 x 0.672
= 3.6 A : Drain current (Min) : ID (Min) ID (Min) = = Io - 3- VIN (Max) - Vo 2L 25 - 16.8 2 x 15 x 10-6 tON x 1 300 x 103 x 0.672
= 2.4 A :
32
MB39A114
PC = ID2 x RDS (ON) x Duty = 32 x 0.018 x 0.672 = 0.109 W : VD x ID x tr x fosc 6 25 x 3 x 15 x 10-9 x 300 x 103 6
PS (ON) = =
= 0.056 W : VD x ID (Max) x tf x fosc 6 25 x 3.6 x 42 x 10-9 x 300 x 103 6
PS (OFF) = =
= 0.189 W : PT = PC + PS (ON) + PS (OFF)
= 0.109 + 0.056 + 0.189 : = 0.354 W : The above power dissipation figures for the PA2714GR are satisfied with ample margin at 2.0 W. 12.6 V setting Input voltage VIN (Max) = 22 V, output voltage VO = 12.6 V, drain current ID = 3 A, oscillation frequency fosc = 300 kHz, L = 15 H, drain-source on resistance RDS (ON) = 18 m, tr = 15 ns, tf = 42 ns : : : Drain current (Max) : ID (Max) ID (Max) = = Io + 3+ VIN (Max) - Vo 2L 22 - 12.6 2 x 15 x 10
-6
ton x 1 300 x 103 x 0.572
= 3.6 A : Drain current (Min) : ID (Min) ID (Min) = = Io - 3- VIN (Max) - Vo 2L 22 - 12.6 2 x 15 x 10-6 tON x 1 300 x 103 x 0.572
= 2.4 A : 33
MB39A114
PC = ID2 x RDS (ON) x Duty = 32 x 0.018 x 0.572 = 0.093 W : VD x ID x tr x fosc 6 22 x 3 x 15 x 10-9 x 300 x 103 6
PS (ON) = =
= 0.050 W : VD x ID (Max) x tf x fosc 6 22 x 3.6 x 42 x 10-9 x 300 x 103 6
PS (OFF) = =
= 0.166 W : PT = = : PC + PS (ON) + PS (OFF) 0.093 + 0.050 + 0.166
= 0.309 W : The above power dissipation figures for the PA2714GR are satisfied with ample margin at 2.0 W. * Inductor In selecting inductors, it is of course essential not to apply more current than the rated capacity of the inductor, but also to note that the lower limit for ripple current is a critical point that if reached will cause discontinuous operation and a considerable drop in efficiency. This can be prevented by choosing a higher inductance value, which will enable continuous operation under light loads. Note that if the inductance value is too high, however, direct current resistance (DCR) is increased and this will also reduce efficiency. The inductance must be set at the point where efficiency is greatest. Note also that the DC superimposition characteristics become worse as the load current value approaches the rated current value of the inductor, so that the inductance value is reduced and ripple current increases, causing loss of efficiency. The selection of rated current value and inductance value will vary depending on where the point of peak efficiency lies with respect to load current. Inductance values are determined by the following formulas. The L value for all load current conditions is set so that the peak to peak value of the ripple current is 1/2 the load current or less. Inductance value : L L 2 (VIN - Vo) Io tON
34
MB39A114
16.8 V output Example) 2 (VIN (Max) - Vo) L Io 2 x (25 - 16.8) 3 12.2 H x
tON 1 300 x 103 x 0.672
12.6 V output Example) 2 (VIN (Max) - Vo) L Io 2 x (22 - 12.6) 3
tON x 1 300 x 103 x 0.572
12.0 H
Inductance values derived from the above formulas are values that provide sufficient margin for continuous operation at maximum load current, but at which continuous operation is not possible at light loads. It is therefore necessary to determine the load level at which continuous operation becomes possible. In this application, the SUMIDA CDRH104R-150 is used. The following formula is available to obtain the load current as a continuous current condition when 15 H is used. The value of the load current satisfying the continuous current condition : Io Io Vo 2L tOFF
Example) Using the CDRH104R-150 15 H (tolerance 30%) , rated current = 3.6 A 16.8 V output Vo Io tOFF 2L 16.8 2 x 15 x 10
-6
x
1 300 x 103
x
(1 - 0.672)
0.61 A 12.6 V output Vo Io tOFF 2L 12.6 2 x 15 x 10-6 x 1 300 x 103 x (1 - 0.572)
0.60 A
35
MB39A114
To determine whether the current through the inductor is within rated values, it is necessary to determine the peak value of the ripple current as well as the peak-to-peak values of the ripple current that affect the output ripple voltage. The peak value and peak-to-peak value of the ripple current can be determined by the following formulas. Peak Value : IL IL Io + VIN - Vo 2L tON
Peak-to-peak Value : IL IL = VIN - Vo L tON
Example) Using the CDRH104R-150 15 H (tolerance 30%) , rated current = 3.6 A Peak Value 16.8 V output IL Io + 3+ VIN - Vo 2L tON x 1 300 x 103 x 0.672
25 - 16.8 2 x 15 x 10-6
3.6 A 12.6 V output IL Io + 3+ VIN - Vo 2L tON x 1 300 x 103 x 0.572
22 - 12.6 2 x 15 x 10-6
3.6 A Peak-to-peak Value 16.8 V output VIN - Vo tON IL = L = 25 - 16.8 15 x 10
-6
x
1 300 x 103
x 0.672
= 1.22 A :
36
MB39A114
12.6 V output VIN - Vo IL = L = 22 - 12.6 15 x 10 = :
-6
tON x 1 300 x 103 x 0.572
1.2 A
* Flyback diode Shottky barrier diode (SBD) is generally used for the flyback diode when the reverse voltage to the diode is less than 40V. The SBD has the characteristics of higher speed in terms of faster reverse recovery time, and lower forward voltage, and is ideal for achieving high efficiency. As long as the DC reverse voltage is sufficiently higher than the input voltage, and the mean current flowing during the diode conduction time is within the mean output current level, and as the peak current is within the peak surge current limits, there is no problem. In this application the ROHM RB053L-30 are used. The diode mean current and diode peak current can be obtained by the following formulas. Diode mean current : IDi IDi Io x (1 - Vo VIN )
Diode peak current : IDip IDip (Io + Vo 2L tOFF)
Example) Using the RB053L-30 VR (DC reverse voltage) = 30 V, mean output current = 3.0 A, peak surge current = 70 A, VF(forward voltage) = 0.42 V, at IF = 3.0 A 16.8 V output IDi Io x 3 (1 - Vo VIN )
x (1 - 0.672)
0.984 A
12.6 V output IDi Io x 3 (1 - Vo VIN )
x (1 - 0.572)
1.284 A
37
MB39A114
16.8 V output IDip (Io + 3.6 A Vo 2L tOFF)
12.6 V output IDip (Io + 3.6 A Vo 2L tOFF)
* Smoothing capacitor The smoothing capacitor is an indispensable element for reducing ripple voltage in output. In selecting a smoothing capacitor, it is essential to consider equivalent series resistance (ESR) and allowable ripple current. Higher ESR means higher ripple voltage, so that to reduce ripple voltage it is necessary to select a capacitor with low ESR. However, the use of a capacitor with low ESR can have substantial effects on loop phase characteristics, and therefore requires attention to system stability. Care should be also taken to use a capacity with sufficient margin for allowable ripple current. This application uses the 20SVP22M (OS-CONTM : SANYO) . The ESR, capacitance value, and ripple current can be calculated from the following formulas. Equivalent series resistance : ESR ESR Vo IL - 1 2fCL
Capacitance value : CL CL IL 2f (Vo - IL x ESR)
Ripple current : ICLrms ICLrms (VIN - Vo) tON 23L
Example) Using the 20SVP22M Rated voltage = 20 V, ESR = 60 m, maximum allowable ripple current = 1450 mArms Equivalent series resistance 16.8 V output Vo 1 ESR - IL 2fCL 38 0.168 1.22 114 m - 1 2 x 300 x 103 x 22 x 10-6
MB39A114
12.6 V output Vo ESR IL 0.126 1.2
- -
1 2fCL 1 2 x 300 x 103 x 22 x 10-6
80 m Capacitance value 16.8 V output CL IL 2f (Vo - IL x ESR) 1.22 2 x 300 x 10 x (0.168 - 1.22 x 0.06)
3
6.8 F 12.6 V output CL IL 2f (Vo - IL x ESR) 1.2 2 x 300 x 10 x (0.126 - 1.2 x 0.06)
3
11.8 F Ripple current 16.8 V output (VIN - Vo) tON ICLrms 23L (25 - 16.8) x 0.672 23 x 15 x 10-6 x 300 x 103
707 mArms 12.6 V output (VIN - Vo) tON ICLrms 23L (22 - 12.6) x 0.572 23 x 15 x 10-6 x 300 x 103
690 mArms
39
MB39A114
s REFERENCE DATA
Conversion efficiency vs. Charging current (constant voltage mode)
100 98 96
Effciency (%)
94 92 90 88 86 84 82 80 0.01 0.1
Ta = +25 C VAC = 19 V VBATT = 12.6 V setting = (VBATT x IBATT) / (VAC x IAC) VBATT conversion
1
10
IBATT (A) Conversion efficiency vs. Charging voltage (constant current mode)
100 98 96
Effciency (%)
94 92 90 88 86 84 82 80 0 2 4 6 8 10 12 14
Ta = +25 C VAC = 19 V IBATT = 3 A setting = (VBATT x IBATT) / (VAC x IAC) VBATT conversion
VBATT (V) BATT voltage vs. BATT charging current (12.6 V setting)
18 16 14
Ta = +25 C VAC = 19 V VBATT = 12.6 V setting
D.C.C. Mode Dead Battery Mode
VBATT (V)
12 10 8 6 4 2 0 0.0 0.5 D.C.C. Mode : Dynamically-controlled charging 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
IBATT (A)
(Continued)
40
MB39A114
Conversion efficiency vs. Charging current (constant voltage mode)
100 98 96
Effciency (%)
94 92 90 88 86 84 82 80 0.01 0.1
Ta = +25 C VAC = 19 V VBATT = 16.8 V setting = (VBATT x IBATT) / (VAC x IAC) VBATT conversion
1
10
IBATT (A) Conversion efficiency vs. Charging voltage (constant current mode)
100 98 96
Effciency (%)
94 92 90 88 86 84 82 80 0 2 4 6 8 10 12 14 16
Ta = +25 C VAC = 19 V IBATT = 3 A setting = (VBATT x IBATT) / (VAC x IAC) VBATT conversion
VBATT (V) BATT voltage vs. BATT charging current (16.8 V setting)
18 16 14 D.C.C. Mode Dead Battery Mode
VBATT (V)
12 10 8 6 4 2 0 0.0
Ta = +25 C VAC = 19 V VBATT = 16.8 V setting D.C.C. Mode : Dynamically-controlled charging
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
IBATT (A)
(Continued)
41
MB39A114
Switching waveform at constant voltage mode (12.6 V setting)
OUT (V) 15 VAC = 19 V CV mode IBATT = 1.5 A VBATT = 12.6 V setting 10 5 0
VD (V) 20 15 10 5 0
0
1
2
3
4
5
6
7
8
9
10 (s)
Switching waveform at constant current mode (12.6 V setting at 10 V)
OUT (V) 15 VD (V) 20 15 10 5 0 VAC = 19 V CC mode IBATT = 3 A setting VBATT = 10 V 10 5 0
0
1
2
3
4
5
6
7
8
9
10 (s)
(Continued)
42
MB39A114
Switching waveform at constant voltage mode (16.8 V setting)
OUT (V) 15 VAC = 19 V CV mode IBATT = 1.5 A VBATT = 16.8 V setting 10 5 0
VD (V) 20 15 10 5 0
0
1
2
3
4
5
6
7
8
9
10 (s)
Switching waveform at constant current mode (16.8 V setting at 10 V)
OUT (V) 15 VAC = 19 V CC mode IBATT = 3 A setting VBATT = 10 V 10 5 0
VD (V) 20 15 10 5 0
0
1
2
3
4
5
6
7
8
9
10 (s)
(Continued)
43
MB39A114
Soft start operating waveform at constant voltage mode (12.6 V setting) (1)
VAC = 19 V CV mode RL = 20 VBATT = 12.6 V setting
VO (V) 20 15 10 5 VO 0 CTL (V) 5 CTL 0
0
2.5
5.0
7.5
10.0
12.5
15.0
17.5
20.0
22.5
25.0 (ms)
Soft start operating waveform at constant voltage mode (12.6 V setting) (2)
CVM (V) 6 4 2 CVM 0 OVP (V) 5 OVP 0 CTL (V) 5 CTL 0 VAC = 19 V CV mode RL = 20 VBATT = 12.6 V setting
0
2.5
5.0
7.5
10.0
12.5
15.0
17.5
20.0
22.5
25.0 (ms)
(Continued)
44
MB39A114
Discharge operating waveform at constant voltage mode (12.6 V setting) (1)
VO (V) 20 15 10 5 VO 0 CTL (V) 5 CTL 0
VAC = 19 V CV mode RL = 20 VBATT = 12.6 V setting
0
2.5
5.0
7.5
10.0
12.5
15.0
17.5
20.0
22.5
25.0 (ms)
Discharge operating waveform at constant voltage mode (12.6 V setting) (2)
CVM (V) 6 4 2 CVM 0 OVP (V) 5 0 CTL (V) 5 CTL 0 OVP VAC = 19 V CV mode RL = 20 VBATT = 12.6 V setting
0
2.5
5.0
7.5
10.0
12.5
15.0
17.5
20.0
22.5
25.0 (ms)
(Continued)
45
MB39A114
Soft start operating waveform at constant current mode (12.6 V setting) (1)
VO (V) 20 15 10 5 VO 0 CTL (V) 5 CTL 0
VAC = 19 V CC mode RL = 3.33 VBATT = 12.6 V setting
0
2.5
5.0
7.5
10.0
12.5
15.0
17.5
20.0
22.5
25.0 (ms)
Soft start operating waveform at constant current mode (12.6 V setting) (2)
CVM (V) 6 4 2 CVM 0 OVP (V) 5 OVP 0 CTL (V) 5 CTL 0
VAC = 19 V CC mode RL = 3.33 VBATT = 12.6 V setting
0
2.5
5.0
7.5
10.0
12.5
15.0
17.5
20.0
22.5
25.0 (ms)
(Continued)
46
MB39A114
Discharge operating waveform at constant current mode (12.6 V setting) (1)
VO (V) 20 15 10 5 VO 0 CTL (V) 5 CTL 0
VAC = 19 V CC mode RL = 3.33 VBATT = 12.6 V setting
0
2.5
5.0
7.5
10.0
12.5
15.0
17.5
20.0
22.5
25.0 (ms)
Discharge operating waveform at constant current mode (12.6 V setting) (2)
CVM (V) 6 4 2 CVM 0 OVP (V) 5 0 CTL (V) 5 CTL 0 OVP VAC = 19 V CC mode RL = 3.33 VBATT = 12.6 V setting
0
2.5
5.0
7.5
10.0
12.5
15.0
17.5
20.0
22.5
25.0 (ms)
(Continued)
47
MB39A114
Soft start operating waveform at constant voltage mode (16.8 V setting) (1)
VO (V) 20 15 10 5 VO 0 CTL (V) 5 CTL 0
VAC = 19 V CV mode RL = 20 VBATT = 16.8 V setting
0
2.5
5.0
7.5
10.0
12.5
15.0
17.5
20.0
22.5
25.0 (ms)
Soft start operating waveform at constant voltage mode (16.8 V setting) (2)
CVM (V) 6 4 2 CVM 0 OVP (V) 5 OVP 0 CTL (V) 5 CTL 0 VAC = 19 V CV mode RL = 20 VBATT = 16.8 V setting
0
2.5
5.0
7.5
10.0
12.5
15.0
17.5
20.0
22.5
25.0 (ms)
(Continued)
48
MB39A114
Discharge operating waveform at constant voltage mode (16.8 V setting) (1)
VO (V) 20 15 10 5 VO 0 CTL (V) 5 CTL 0
VAC = 19 V CV mode RL = 20 VBATT = 16.8 V setting
0
2.5
5.0
7.5
10.0
12.5
15.0
17.5
20.0
22.5
25.0 (ms)
Discharge operating waveform at constant voltage mode (16.8 V setting) (2)
CVM (V) 6 4 2 CVM 0 OVP (V) 5 OVP 0 CTL (V) 5 CTL 0 VAC = 19 V CV mode RL = 20 VBATT = 16.8 V setting
0
2.5
5.0
7.5
10.0
12.5
15.0
17.5
20.0
22.5
25.0 (ms)
(Continued)
49
MB39A114
Soft start operating waveform at constant current mode (16.8 V setting) (1)
VO (V) 20 15 10 5 VO 0 CTL (V) 5 CTL 0
VAC = 19 V CC mode RL = 3.33 VBATT = 16.8 V setting
0
2.5
5.0
7.5
10.0
12.5
15.0
17.5
20.0
22.5
25.0 (ms)
Soft start operating waveform at constant current mode (16.8 V setting) (2)
CVM (V) 6 4 2 CVM 0 OVP (V) 5 OVP 0 CTL (V) 5 CTL 0 VAC = 19 V CC mode RL = 3.33 VBATT = 16.8 V setting
0
2.5
5.0
7.5
10.0
12.5
15.0
17.5
20.0
22.5
25.0 (ms)
(Continued)
50
MB39A114
(Continued)
Discharge operating waveform at constant current mode (16.8 V setting) (1)
VO (V) 20 15 10 5 VO 0 CTL (V) 5 CTL 0
VAC = 19 V CC mode RL = 3.33 VBATT = 16.8 V setting
0
2.5
5.0
7.5
10.0
12.5
15.0
17.5
20.0
22.5
25.0 (ms)
Discharge operating waveform at constant current mode (16.8 V setting) (2)
CVM (V) 6 4 2 CVM 0 OVP (V) 5 OVP 0 CTL (V) 5 CTL 0 VAC = 19 V CC mode RL = 3.33 VBATT = 16.8 V setting
0
2.5
5.0
7.5
10.0
12.5
15.0
17.5
20.0
22.5
25.0 (ms)
51
MB39A114
s USAGE PRECAUTIONS
* Printed circuit board ground lines should be set up with consideration for common impedance. * Take appropriate static electricity measures. * Containers for semiconductor materials should have anti-static protection or be made of conductive material. * After mounting, printed circuit boards should be stored and shipped in conductive bags or containers. * Work platforms, tools, and instruments should be properly grounded. * Working personnel should be grounded with resistance of 250 k to 1 M between body and ground. * Do not apply negative voltages. * The use of negative voltages below -0.3 V may create parasitic transistors on LSI lines, which can cause abnormal operation.
s ORDERING INFORMATION
Part number MB39A114PFV Package 24-pin plastic SSOP (FPT-24P-M03) Remarks
52
MB39A114
s PACKAGE DIMENSION
24-pin plastic SSOP (FPT-24P-M03) Note 1) *1 : Resin protrusion. (Each side : +0.15 (.006) Max) . Note 2) *2 : These dimensions do not include resin protrusion. Note 3) Pins width and pins thickness include plating thickness. Note 4) Pins width do not include tie bar cutting remainder.
0.170.03 (.007.001)
13
*17.750.10(.305.004)
24
*2 5.600.10
INDEX
7.600.20 (.220.004) (.299.008) Details of "A" part 1.25 -0.10 .049 -.004
+0.20 +.008
(Mounting height)
0.25(.010) 0~8
1
12
"A"
M
0.65(.026)
0.24 -0.07 .009 -.003
+0.08 +.003
0.13(.005)
0.500.20 (.020.008) 0.600.15 (.024.006)
0.100.10 (.004.004) (Stand off)
0.10(.004)
C
2003 FUJITSU LIMITED F24018S-c-4-5
Dimensions in mm (inches). Note: The values in parentheses are reference values.
53
MB39A114
FUJITSU LIMITED
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F0405 (c) FUJITSU LIMITED Printed in Japan
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